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Approach 3 (record floor field): build905.zig declares cpu_floor="baseline" beside the default_target pin and writes cpu_floor + cpu_model into each family member's embedded record [provenance] (= target.result.cpu.model.name, so "x86_64" for the default build, "znver5" for -Dcpu=native - the floor is a default, not a restriction). family_artifacts.tcl derives both from the embedded record (G-117 single-source-of-truth) into the sidecar [provenance], failing if absent; family_check.tcl asserts them non-empty. Approach 4 (audit tool): scriptlib/developer/cpufloor_audit.tcl disassembles a binary's .text via a located objdump (llvm-objdump preferred, GNU fallback) or audits a pre-disassembled excerpt, classifies by AVX register width (zmm=v4, ymm=v3; baseline/v2 forbid both, v3 forbids zmm, v4 allows all), reports out-of-floor count + first RVA + sample mnemonics, exit 0 PASS / 1 FAIL. Bundled fixtures in cpufloor_fixtures/ are real disassembly excerpts (avx512, avx2, clean); selftest 12/12 cases pass. Verified on real binaries: rebuilt bin/punkzip.exe PASS (zmm=0); a -Dcpu=native probe FAILs at baseline (123 zmm) and PASSes at v4. Approach 5 (punk-runtime surfacing): both .ps1 and .bash twins updated and re-wrapped. Host CPU level detection (PS via IsProcessorFeaturePresent PF SSE2=10/SSE4.2=38/AVX2=40/AVX512F=41; bash via /proc/cpuinfo flags) feeds a meets/below/unknown/norecord verdict. fetch prints cpu floor (UNGATED - a cross-platform fetch for another machine stays free); list annotates rows the host cannot run (!CPU-FLOOR:v<req>, local rows only); use/run gate on below with a named diagnosis instead of a silent STATUS_ILLEGAL_INSTRUCTION (0xC000001D) - the 2026-08-06 AVX-512 regression failure mode; info adds the fields. bin/punk-runtime.cmd re-wrapped (deterministic; scriptwrap_runtime_cmd_roundtrip_no_drift test PASSES). Activation: overlap survey re-run at activation (goals_xref score G-172) - no goals drafted in the interval; existing Related: notes cover every pair. Project version 0.57.0 -> 0.57.1 (patch - user-visible punk-runtime behaviour shipped in kits). Remaining for acceptance: rebuild + republish in-situ (per Approach 6's alpha dispensation) and audit the republished artifacts to confirm zmm=0 - a publication-time, user-owned step. Assisted-by: harness=pi; primary-model=huggingface/zai-org/GLM-5.2; api-location=huggingface.comaster
15 changed files with 1131 additions and 10 deletions
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|
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#cpufloor_audit.tcl - G-172 audit instrument: disassemble a distributed binary |
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#(or a pre-disassembled .text excerpt) and report instructions above a declared |
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#CPU instruction-set floor. The acceptance criterion of G-172 ("a flagless build |
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#of each distributed-artifact recipe emits zero instructions above the declared |
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#floor") is measurable by THIS tool rather than by a promise about build habits. |
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# |
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#The defect class (see goals/G-172-distributed-binary-cpu-floor.md Context): zig |
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#auto-vectorises ReleaseFast codegen to whatever the build host's CPU happens |
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#to expose when a recipe resolves cpu_model .determined_by_arch_os by NATIVE |
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#detection. On a Zen 5 host that is AVX-512 - real EVEX-encoded zmm-operand |
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#instructions at the front of .text. Tcl has no runtime CPU dispatch, so on a |
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#non-AVX-512 CPU the first one raises #UD and the process dies with |
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#STATUS_ILLEGAL_INSTRUCTION (0xC000001D) before writing a byte. The 2026-08-06 |
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#regression shipped the entire published tclsh9.0.5 family (2756 zmm sites each) |
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#and the build-path tools (punkzip 1724, punkres 1423) - the bundled fixtures |
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#are real excerpts of that codegen class. |
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# |
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#Detection is by AVX REGISTER WIDTH, the same signal the Context measurements |
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#used: a `zmm[0-9]+` operand is AVX-512 (x86-64 v4), a `ymm[0-9]+` operand is |
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#AVX2 (x86-64 v3). Size specifiers (zmmword/ymmword/xmmword) never match - they |
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#lack the trailing digit. SSE4.2/POPCNT (the v2-only delta over baseline) is |
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#not detectable by width; baseline and v2 therefore share the same register |
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#ceiling (no AVX) and audit identically. The regression is AVX-width, so this |
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#is the honest instrument for it; a future finer-grained floor (per-instruction |
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#mnemonic classification) is a follow-on, not required by the acceptance. |
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# |
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#Plain tclsh, no dependencies. Exit 0 = no instructions above floor (PASS); |
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#exit 1 = out-of-floor instructions found (FAIL) or a selftest failure. |
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# |
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#Usage: |
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# tclsh cpufloor_audit.tcl ?-floor baseline|v2|v3|v4? <binary> |
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# Disassemble <binary>'s .text with a located objdump and audit it. |
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# llvm-objdump is preferred (Intel syntax), GNU objdump (-M intel) is the |
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# fallback. No disassembler on PATH is a hard error (install llvm-objdump, |
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# or pipe a pre-disassembled excerpt in with -from-dis). |
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# tclsh cpufloor_audit.tcl -from-dis ?-floor <f>? <dis-text-file> |
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# Audit a pre-disassembled .text excerpt (objdump -d output) directly - |
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# no disassembler needed. The bundled fixtures are this shape. |
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# tclsh cpufloor_audit.tcl -selftest |
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# Run the bundled fixtures (scriptlib/developer/cpufloor_fixtures/) through |
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# every floor and check the verdicts - the regression-as-fixture contract. |
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# |
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#Floor defaults to baseline (the project's chosen floor for the x86_64 family - |
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#see G-172 Approach 2: a Tcl interpreter's codegen delta against v2/v3 is |
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#negligible against the cost of the default runtime failing to start). |
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|
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package require Tcl 8.6 |
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|
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proc scriptdir {} { |
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global argv0 |
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return [file dirname [file normalize $argv0]] |
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} |
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|
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proc floor_forbidden {floor} { |
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switch -- $floor { |
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baseline { return [dict create zmm 1 ymm 1] } |
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v2 { return [dict create zmm 1 ymm 1] } |
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v3 { return [dict create zmm 1 ymm 0] } |
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v4 { return [dict create zmm 0 ymm 0] } |
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default { error "unknown floor '$floor' (expected baseline, v2, v3 or v4)" } |
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} |
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} |
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|
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#is <line> an instruction line (addr: hexbytes... mnemonic...)? |
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proc is_insn_line {line} { |
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return [regexp {^\s*[0-9a-fA-F]+:\s+([0-9a-fA-F]{2}\s)+} $line] |
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} |
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|
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#extract the mnemonic of an instruction line (first token after the hex-byte run) |
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proc insn_mnemonic {line} { |
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if {![regexp {^\s*[0-9a-fA-F]+:\s+(.+)$} $line -> rest]} { return "" } |
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set rest [regsub {^([0-9a-fA-F]{2}\s+)+} $rest ""] |
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set rest [regsub {^\s+} $rest ""] |
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set mnem [lindex [split $rest \t] 0] |
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return [lindex [split $mnem " "] 0] |
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} |
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|
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#audit a list of disassembly lines against a floor. |
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#returns dict: total zmm_sites ymm_sites out_of_floor first_rva sample_mnemonics |
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proc audit_lines {lines floor} { |
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set forbidden [floor_forbidden $floor] |
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set fz [dict get $forbidden zmm] |
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set fy [dict get $forbidden ymm] |
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set total 0 |
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set zmm 0 |
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set ymm 0 |
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set out 0 |
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set first_rva "" |
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set mnemonics {} |
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foreach line $lines { |
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if {![is_insn_line $line]} continue |
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incr total |
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set line_zmm [expr {[regexp {zmm[0-9]+} $line] ? 1 : 0}] |
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set line_ymm [expr {[regexp {ymm[0-9]+} $line] ? 1 : 0}] |
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if {$line_zmm} { incr zmm } |
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if {$line_ymm} { incr ymm } |
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set line_out 0 |
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if {$line_zmm && $fz} { set line_out 1 } |
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if {$line_ymm && $fy} { set line_out 1 } |
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if {!$line_out} continue |
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incr out |
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if {$first_rva eq ""} { |
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regexp {^\s*([0-9a-fA-F]+):} $line -> first_rva |
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} |
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set mnem [insn_mnemonic $line] |
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if {$mnem ne "" && $mnem ni $mnemonics && [llength $mnemonics] < 12} { |
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lappend mnemonics $mnem |
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} |
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} |
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return [dict create total $total zmm_sites $zmm ymm_sites $ymm \ |
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out_of_floor $out first_rva $first_rva sample_mnemonics $mnemonics] |
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} |
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|
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#locate a disassembler and return a command prefix that disassembles .text in |
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#Intel syntax. Empty string = none found. |
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proc find_disassembler {} { |
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foreach {cmd} { |
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{llvm-objdump -d --section=.text --x86-asm-syntax=intel} |
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{objdump -d --section=.text -M intel} |
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} { |
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set exe [auto_execok [lindex $cmd 0]] |
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if {$exe ne ""} { |
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return [concat [list $exe] [lrange $cmd 1 end]] |
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} |
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} |
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return "" |
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} |
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|
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proc read_lines {path} { |
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set f [open $path r] |
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fconfigure $f -translation binary |
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set data [read $f] |
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close $f |
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#normalise CRLF -> LF so the parser sees one line model |
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return [split [string map [list \r\n \n \r \n] $data] \n] |
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} |
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|
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proc report {path floor res} { |
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set out [dict get $res out_of_floor] |
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set zmm [dict get $res zmm_sites] |
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set ymm [dict get $res ymm_sites] |
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set total [dict get $res total] |
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puts "cpufloor_audit: $path" |
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puts " floor: $floor" |
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puts " .text insns: $total" |
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puts " zmm sites (v4): $zmm" |
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puts " ymm sites (v3): $ymm" |
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puts " out-of-floor: $out" |
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if {$out > 0} { |
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puts " first out-of-floor RVA: [dict get $res first_rva]" |
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set ms [dict get $res sample_mnemonics] |
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if {[llength $ms]} { |
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puts " sample out-of-floor mnemonics: [join $ms {, }]" |
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} |
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puts " VERDICT: FAIL - instructions above the declared floor are present" |
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} else { |
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puts " VERDICT: PASS - no instructions above the declared floor" |
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} |
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} |
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|
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proc usage {} { |
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puts stderr "usage: tclsh cpufloor_audit.tcl ?-floor baseline|v2|v3|v4? <binary>" |
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puts stderr " tclsh cpufloor_audit.tcl -from-dis ?-floor <f>? <dis-text-file>" |
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puts stderr " tclsh cpufloor_audit.tcl -selftest" |
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} |
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|
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proc selftest {} { |
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set d [file join [scriptdir] cpufloor_fixtures] |
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set cases { |
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{avx512.dis.txt baseline 1} |
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{avx512.dis.txt v2 1} |
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{avx512.dis.txt v3 1} |
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{avx512.dis.txt v4 0} |
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{avx2.dis.txt baseline 1} |
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{avx2.dis.txt v2 1} |
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{avx2.dis.txt v3 0} |
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{avx2.dis.txt v4 0} |
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{clean.dis.txt baseline 0} |
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{clean.dis.txt v2 0} |
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{clean.dis.txt v3 0} |
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{clean.dis.txt v4 0} |
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} |
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set fail 0 |
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foreach case $cases { |
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lassign $case fixture floor expect_fail |
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set p [file join $d $fixture] |
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if {![file exists $p]} { |
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puts "SELFTEST FAIL: fixture missing: $p" |
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incr fail |
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continue |
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} |
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set res [audit_lines [read_lines $p] $floor] |
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set got [dict get $res out_of_floor] |
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set got_fail [expr {$got > 0 ? 1 : 0}] |
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set zmm [dict get $res zmm_sites] |
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set ymm [dict get $res ymm_sites] |
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set status OK |
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if {$got_fail != $expect_fail} { |
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set status "MISMATCH (expected [expr {$expect_fail ? {FAIL} : {PASS}}])" |
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incr fail |
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} |
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puts [format "SELFTEST %-16s floor=%-9s zmm=%-4d ymm=%-4d out=%-4d %s" \ |
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$fixture $floor $zmm $ymm $got $status] |
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} |
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if {$fail} { |
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puts "SELFTEST: $fail case(s) failed" |
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return 1 |
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} |
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puts "SELFTEST: all cases pass" |
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return 0 |
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} |
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|
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#--- argv parsing --- |
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set floor baseline |
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set from_dis 0 |
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set selftest_mode 0 |
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set positional {} |
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foreach a $argv { |
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switch -- $a { |
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-floor { set expecting_floor 1 } |
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-from-dis { set from_dis 1 } |
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-selftest { set selftest_mode 1 } |
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-help - --help - -h { |
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usage; exit 0 |
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} |
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default { |
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if {[info exists expecting_floor]} { |
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set floor $a |
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unset expecting_floor |
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} else { |
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lappend positional $a |
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} |
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} |
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} |
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} |
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if {[info exists expecting_floor]} { |
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usage; exit 1 |
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} |
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if {$selftest_mode} { |
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exit [selftest] |
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} |
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|
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if {[llength $positional] == 0} { |
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usage; exit 1 |
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} |
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set target [lindex $positional 0] |
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if {![file exists $target]} { |
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puts stderr "cpufloor_audit: no such file: $target" |
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exit 1 |
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} |
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|
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if {$from_dis} { |
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set lines [read_lines $target] |
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} else { |
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set dis [find_disassembler] |
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if {$dis eq ""} { |
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puts stderr "cpufloor_audit: no disassembler found on PATH (tried llvm-objdump, objdump)." |
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puts stderr " install llvm-objdump, or pass a pre-disassembled excerpt with -from-dis." |
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exit 1 |
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} |
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set cmd [concat $dis [list $target]] |
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if {[catch {exec {*}$cmd 2>@1} disout]} { |
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#objdump returns nonzero on some warnings but still emits disassembly; |
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#only treat as fatal if there is no instruction output at all |
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if {![regexp -inline {[0-9a-fA-F]+:} $disout]} { |
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puts stderr "cpufloor_audit: disassembler failed: $disout" |
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exit 1 |
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} |
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} |
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set lines [split [string map [list \r\n \n \r \n] $disout] \n] |
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} |
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set res [audit_lines $lines $floor] |
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report $target $floor $res |
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exit [expr {[dict get $res out_of_floor] > 0 ? 1 : 0}] |
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sample.exe: file format coff-x86-64 |
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Disassembly of section .text: |
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140015fc2: c5 fc 10 07 vmovups ymm0, ymmword ptr [rdi] |
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140016001: c5 fc 11 06 vmovups ymmword ptr [rsi], ymm0 |
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140016ca6: c5 fc 10 00 vmovups ymm0, ymmword ptr [rax] |
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140016cad: c5 fc 11 06 vmovups ymmword ptr [rsi], ymm0 |
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140017842: c4 e2 7d 13 c9 vcvtph2ps ymm1, xmm1 |
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14001785b: c4 e2 7d 13 db vcvtph2ps ymm3, xmm3 |
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140017884: c4 e2 7d 13 c0 vcvtph2ps ymm0, xmm0 |
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140017889: c5 f4 59 c8 vmulps ymm1, ymm1, ymm0 |
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14001788d: c5 e4 59 c0 vmulps ymm0, ymm3, ymm0 |
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140017891: c4 e3 7d 1d c9 04 vcvtps2ph xmm1, ymm1, 0x4 |
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140017897: c4 e3 7d 1d c0 04 vcvtps2ph xmm0, ymm0, 0x4 |
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1400178c7: c4 e3 7d 1d c9 04 vcvtps2ph xmm1, ymm1, 0x4 |
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1400178cd: c4 e3 7d 1d c0 04 vcvtps2ph xmm0, ymm0, 0x4 |
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14001853e: c5 fc 10 01 vmovups ymm0, ymmword ptr [rcx] |
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140018542: c5 fc 11 00 vmovups ymmword ptr [rax], ymm0 |
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140018b07: c4 e2 7d 13 ed vcvtph2ps ymm5, xmm5 |
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140018b0c: c4 e2 7d 13 e4 vcvtph2ps ymm4, xmm4 |
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140018b11: c5 dc 59 e5 vmulps ymm4, ymm4, ymm5 |
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140018b15: 62 b3 7d 28 1d e0 04 vcvtps2ph xmm16, ymm4, 0x4 |
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140018b23: 62 a2 7d 28 13 c8 vcvtph2ps ymm17, xmm16 |
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140018b2e: 62 f1 74 20 5c ec vsubps ymm5, ymm17, ymm4 |
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140018b34: 62 b1 5c 28 58 e1 vaddps ymm4, ymm4, ymm17 |
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140018b3a: c4 e3 7d 1d ed 04 vcvtps2ph xmm5, ymm5, 0x4 |
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140018b40: c4 e3 7d 1d e4 04 vcvtps2ph xmm4, ymm4, 0x4 |
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140021500: c4 c1 7c 11 0a vmovups ymmword ptr [r10], ymm1 |
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1400218d0: c4 c1 7c 11 0e vmovups ymmword ptr [r14], ymm1 |
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140021d80: c4 c1 7e 7f 06 vmovdqu ymmword ptr [r14], ymm0 |
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1400221e0: c4 c1 7e 7f 06 vmovdqu ymmword ptr [r14], ymm0 |
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@ -0,0 +1,70 @@
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sample.exe: file format coff-x86-64 |
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|
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Disassembly of section .text: |
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140002917: 83 e0 04 and eax, 0x4 |
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14000291a: 49 29 c1 sub r9, rax |
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14000291d: 44 89 11 mov dword ptr [rcx], r10d |
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140002920: 44 8b 14 02 mov r10d, dword ptr [rdx + rax] |
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140002924: 44 89 14 01 mov dword ptr [rcx + rax], r10d |
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140002928: 46 8b 14 0a mov r10d, dword ptr [rdx + r9] |
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14000292c: 42 8b 54 02 fc mov edx, dword ptr [rdx + r8 - 0x4] |
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140002931: 46 89 14 09 mov dword ptr [rcx + r9], r10d |
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140002935: 42 89 54 01 fc mov dword ptr [rcx + r8 - 0x4], edx |
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14000293a: 48 89 c8 mov rax, rcx |
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14000293d: 5e pop rsi |
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14000293e: 5d pop rbp |
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14000293f: c3 ret |
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140002940: 49 81 f8 ff 00 00 00 cmp r8, 0xff |
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140002947: 77 3c ja 0x140002985 <.text+0x1985> |
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140002949: 44 89 c0 mov eax, r8d |
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14000294c: d1 e8 shr eax |
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14000294e: 4d 8d 48 c0 lea r9, [r8 - 0x40] |
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140002952: 62 f1 7c 48 10 02 vmovups zmm0, zmmword ptr [rdx] |
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140002958: 83 e0 40 and eax, 0x40 |
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14000295b: 49 29 c1 sub r9, rax |
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14000295e: 62 f1 7c 48 10 14 02 vmovups zmm2, zmmword ptr [rdx + rax] |
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140002965: 62 b1 7c 48 10 0c 0a vmovups zmm1, zmmword ptr [rdx + r9] |
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14000296c: 62 f1 7c 48 11 01 vmovups zmmword ptr [rcx], zmm0 |
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140002972: 62 f1 7c 48 11 14 01 vmovups zmmword ptr [rcx + rax], zmm2 |
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140002979: 62 b1 7c 48 11 0c 09 vmovups zmmword ptr [rcx + r9], zmm1 |
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140002980: e9 12 01 00 00 jmp 0x140002a97 <.text+0x1a97> |
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140002985: 62 f1 7c 48 10 02 vmovups zmm0, zmmword ptr [rdx] |
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14000298b: 41 89 d1 mov r9d, edx |
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14000298e: 41 83 e1 3f and r9d, 0x3f |
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140002992: 4f 8d 54 01 c0 lea r10, [r9 + r8 - 0x40] |
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140002997: 49 c1 ea 06 shr r10, 0x6 |
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14000299b: 44 89 d0 mov eax, r10d |
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14000299e: 4d 8d 5a ff lea r11, [r10 - 0x1] |
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1400029a2: 83 e0 07 and eax, 0x7 |
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1400029a5: 62 f1 7c 48 11 01 vmovups zmmword ptr [rcx], zmm0 |
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1400029ab: 49 83 fb 07 cmp r11, 0x7 |
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1400029af: 73 08 jae 0x1400029b9 <.text+0x19b9> |
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1400029b1: 45 31 db xor r11d, r11d |
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1400029b4: e9 a9 00 00 00 jmp 0x140002a62 <.text+0x1a62> |
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1400029b9: be 00 02 00 00 mov esi, 0x200 |
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1400029be: 49 83 e2 f8 and r10, -0x8 |
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1400029c2: 45 31 db xor r11d, r11d |
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1400029c5: 4c 29 ce sub rsi, r9 |
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1400029c8: 0f 1f 84 00 00 00 00 00 nop dword ptr [rax + rax] |
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1400029d0: 62 f1 7c 48 28 44 32 f9 vmovaps zmm0, zmmword ptr [rdx + rsi - 0x1c0] |
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1400029d8: 62 f1 7c 48 28 4c 32 fa vmovaps zmm1, zmmword ptr [rdx + rsi - 0x180] |
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1400029e0: 62 f1 7c 48 28 54 32 fb vmovaps zmm2, zmmword ptr [rdx + rsi - 0x140] |
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1400029e8: 49 83 c3 08 add r11, 0x8 |
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1400029ec: 62 f1 7c 48 11 44 31 f9 vmovups zmmword ptr [rcx + rsi - 0x1c0], zmm0 |
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1400029f4: 62 f1 7c 48 11 4c 31 fa vmovups zmmword ptr [rcx + rsi - 0x180], zmm1 |
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1400029fc: 62 f1 7c 48 28 4c 32 fc vmovaps zmm1, zmmword ptr [rdx + rsi - 0x100] |
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140002a04: 62 f1 7c 48 11 54 31 fb vmovups zmmword ptr [rcx + rsi - 0x140], zmm2 |
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140002a0c: 62 f1 7c 48 28 54 32 fd vmovaps zmm2, zmmword ptr [rdx + rsi - 0xc0] |
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140002a14: 62 f1 7c 48 11 4c 31 fc vmovups zmmword ptr [rcx + rsi - 0x100], zmm1 |
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140002a1c: 62 f1 7c 48 28 4c 32 fe vmovaps zmm1, zmmword ptr [rdx + rsi - 0x80] |
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140002a24: 62 f1 7c 48 11 54 31 fd vmovups zmmword ptr [rcx + rsi - 0xc0], zmm2 |
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140002a2c: 62 f1 7c 48 28 54 32 ff vmovaps zmm2, zmmword ptr [rdx + rsi - 0x40] |
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140002a34: 62 f1 7c 48 11 4c 31 fe vmovups zmmword ptr [rcx + rsi - 0x80], zmm1 |
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140002a3c: 62 f1 7c 48 28 0c 32 vmovaps zmm1, zmmword ptr [rdx + rsi] |
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140002a43: 62 f1 7c 48 11 54 31 ff vmovups zmmword ptr [rcx + rsi - 0x40], zmm2 |
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140002a4b: 62 f1 7c 48 11 0c 31 vmovups zmmword ptr [rcx + rsi], zmm1 |
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140002a52: 48 81 c6 00 02 00 00 add rsi, 0x200 |
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140002a59: 4d 39 da cmp r10, r11 |
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140002a5c: 0f 85 6e ff ff ff jne 0x1400029d0 <.text+0x19d0> |
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140002a62: 48 85 c0 test rax, rax |
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@ -0,0 +1,70 @@
|
||||
|
||||
sample.exe: file format coff-x86-64 |
||||
|
||||
Disassembly of section .text: |
||||
|
||||
0000000140001000 <.text>: |
||||
140001000: 55 push rbp |
||||
140001001: 56 push rsi |
||||
140001002: 48 89 e5 mov rbp, rsp |
||||
140001005: 45 85 c9 test r9d, r9d |
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140001008: 7e 6e jle 0x140001078 <.text+0x78> |
||||
14000100a: 44 89 c8 mov eax, r9d |
||||
14000100d: 41 83 f9 01 cmp r9d, 0x1 |
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140001011: 75 05 jne 0x140001018 <.text+0x18> |
||||
140001013: 45 31 c9 xor r9d, r9d |
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140001016: eb 49 jmp 0x140001061 <.text+0x61> |
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140001018: 41 89 c2 mov r10d, eax |
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14000101b: 41 81 e2 fe ff ff 7f and r10d, 0x7ffffffe |
||||
140001022: 45 31 c9 xor r9d, r9d |
||||
140001025: 66 2e 0f 1f 84 00 00 00 00 00 nop word ptr cs:[rax + rax] |
||||
14000102f: 90 nop |
||||
140001030: 4f 8b 1c c8 mov r11, qword ptr [r8 + 8*r9] |
||||
140001034: 4f 8d 1c 5b lea r11, [r11 + 2*r11] |
||||
140001038: 4a 8b 34 ca mov rsi, qword ptr [rdx + 8*r9] |
||||
14000103c: 49 01 f3 add r11, rsi |
||||
14000103f: 4c 89 1c f1 mov qword ptr [rcx + 8*rsi], r11 |
||||
140001043: 4f 8b 5c c8 08 mov r11, qword ptr [r8 + 8*r9 + 0x8] |
||||
140001048: 4f 8d 1c 5b lea r11, [r11 + 2*r11] |
||||
14000104c: 4a 8b 74 ca 08 mov rsi, qword ptr [rdx + 8*r9 + 0x8] |
||||
140001051: 49 01 f3 add r11, rsi |
||||
140001054: 4c 89 1c f1 mov qword ptr [rcx + 8*rsi], r11 |
||||
140001058: 49 83 c1 02 add r9, 0x2 |
||||
14000105c: 4d 39 ca cmp r10, r9 |
||||
14000105f: 75 cf jne 0x140001030 <.text+0x30> |
||||
140001061: a8 01 test al, 0x1 |
||||
140001063: 74 13 je 0x140001078 <.text+0x78> |
||||
140001065: 4b 8b 04 c8 mov rax, qword ptr [r8 + 8*r9] |
||||
140001069: 48 8d 04 40 lea rax, [rax + 2*rax] |
||||
14000106d: 4a 8b 14 ca mov rdx, qword ptr [rdx + 8*r9] |
||||
140001071: 48 01 d0 add rax, rdx |
||||
140001074: 48 89 04 d1 mov qword ptr [rcx + 8*rdx], rax |
||||
140001078: 5e pop rsi |
||||
140001079: 5d pop rbp |
||||
14000107a: c3 ret |
||||
14000107b: 0f 1f 44 00 00 nop dword ptr [rax + rax] |
||||
140001080: 55 push rbp |
||||
140001081: 41 57 push r15 |
||||
140001083: 41 56 push r14 |
||||
140001085: 41 54 push r12 |
||||
140001087: 56 push rsi |
||||
140001088: 57 push rdi |
||||
140001089: 53 push rbx |
||||
14000108a: 48 83 ec 20 sub rsp, 0x20 |
||||
14000108e: 48 8d 6c 24 20 lea rbp, [rsp + 0x20] |
||||
140001093: 48 89 d6 mov rsi, rdx |
||||
140001096: 48 63 f9 movsxd rdi, ecx |
||||
140001099: 48 8d 1c 7f lea rbx, [rdi + 2*rdi] |
||||
14000109d: 4c 8d 34 bd 00 00 00 00 lea r14, [4*rdi] |
||||
1400010a5: 4c 8d 3c 3f lea r15, [rdi + rdi] |
||||
1400010a9: 45 31 e4 xor r12d, r12d |
||||
1400010ac: e8 6f 06 00 00 call 0x140001720 <.text+0x720> |
||||
1400010b1: 48 8d 05 98 df 02 00 lea rax, [rip + 0x2df98] # 0x14002f050 |
||||
1400010b8: 0f 1f 84 00 00 00 00 00 nop dword ptr [rax + rax] |
||||
1400010c0: 4a 89 34 e0 mov qword ptr [rax + 8*r12], rsi |
||||
1400010c4: 48 8d 0c 37 lea rcx, [rdi + rsi] |
||||
1400010c8: 4a 89 4c e0 08 mov qword ptr [rax + 8*r12 + 0x8], rcx |
||||
1400010cd: 49 8d 0c 37 lea rcx, [r15 + rsi] |
||||
1400010d1: 4a 89 4c e0 10 mov qword ptr [rax + 8*r12 + 0x10], rcx |
||||
1400010d6: 48 8d 0c 33 lea rcx, [rbx + rsi] |
||||
1400010da: 4a 89 4c e0 18 mov qword ptr [rax + 8*r12 + 0x18], rcx |
||||
Loading…
Reference in new issue